From d6e4ef72e1cd9aea898fa8bb3cf0b878ea542f84 Mon Sep 17 00:00:00 2001 From: sldesnoo-Delft <s.l.desnoo@tudelft.nl> Date: Fri, 13 May 2022 15:30:41 +0200 Subject: [PATCH] More realistic example --- .../examples/example_bias_T_compensation.py | 20 ++++++++----------- 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/pulse_lib/examples/example_bias_T_compensation.py b/pulse_lib/examples/example_bias_T_compensation.py index d4dddd18..f8ed8023 100644 --- a/pulse_lib/examples/example_bias_T_compensation.py +++ b/pulse_lib/examples/example_bias_T_compensation.py @@ -10,7 +10,7 @@ from utils.plot import plot_awgs awgs = init_hardware() # RC time = 1 ms -bias_T_rc_time = 0.001 +bias_T_rc_time = 0.1 compensate_bias_T = True # create channels P1, P2 @@ -27,30 +27,26 @@ P2 = ( -25, 25) P3 = ( 25, -25) seg1 = p.mk_segment(name='init') -seg1.add_block(0, 10000, gates, P0, reset_time=True) +seg1.add_block(0, 10000000, gates, P0, reset_time=True) seg2 = p.mk_segment(name='load') -seg2.add_block(0, 10000, gates, P1, reset_time=True) +seg2.add_block(0, 10000000, gates, P1, reset_time=True) seg3 = p.mk_segment(name='measure') -seg3.add_ramp(0, 500, gates, P1, P2, reset_time=True) -seg3.add_ramp(0, 500, gates, P2, P3, reset_time=True) -seg3.add_block(0, 500000, gates, P3, reset_time=True) -seg4 = p.mk_segment() -seg4.add_block(0, 10000, gates, P0, reset_time=True) +seg3.add_block(0, 50000000, gates, P3, reset_time=True) # generate the sequence and upload it. -my_seq = p.mk_sequence([seg1, seg2, seg3, seg4]) +my_seq = p.mk_sequence([seg1, seg2, seg3]) my_seq.set_hw_schedule(HardwareScheduleMock()) -my_seq.sample_rate = 1e8 +my_seq.sample_rate = 1e7 my_seq.upload() my_seq.play() plot_awgs(awgs, bias_T_rc_time=bias_T_rc_time) -pt.title('AWG upload (with DC compensation)') +pt.title('With bias-T compensation') pt.grid(True) -pt.ylim(-0.25, 0.25) +pt.ylim(-0.30, 0.55) -- GitLab