M7 dcache ctrl via a parameter (#11769)

* Support for armv7-m_dcache control via parameter

  The FORCE_F7_DCACHE parameter can be set to
   0 - (default) if Eratta exits turn dcache off else leave it on
   1 -  Force it off
   2 -  Force it on

   At boot the system will disable the d-cache if the silicon
   has the 1259864 Data corruption in a sequence of Write-Through
   stores and loads eratta.

   Post nsh script execution the FORCE_F7_DCACHE paramater
   will be used to set the d-cache to the state indicated
   above.

boards/av/x-v1/default.cmake

@@ -48,6 +48,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		#stm32/tone_alarm
 		tap_esc
 		telemetry # all available telemetry drivers

boards/av/x-v1/nuttx-config/nsh/defconfig

@@ -41,10 +41,13 @@ CONFIG_ARCH_INTERRUPTSTACK=750
 CONFIG_ARCH_MATH_H=y
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_BASEPRI_WAR=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
 CONFIG_ARMV7M_DTCM=y
 CONFIG_ARMV7M_ICACHE=y
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_BOARDCTL_FINALINIT=y
 CONFIG_BOARDCTL_RESET=y
 CONFIG_BOARD_CRASHDUMP=y
 CONFIG_BOARD_LOOPSPERMSEC=43103

boards/av/x-v1/src/init.c

 /****************************************************************************
  *
- *   Copyright (c) 2018 PX4 Development Team. All rights reserved.
+ *   Copyright (c) 2018-2019 PX4 Development Team. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -150,6 +150,31 @@ __EXPORT void board_on_reset(int status)
 	}
 }
 
+/****************************************************************************
+ * Name: board_app_finalinitialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command
+ *   BOARDIOC_FINALINIT.
+ *
+ * Input Parameters:
+ *   arg - The argument has no meaning.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARDCTL_FINALINIT
+int board_app_finalinitialize(uintptr_t arg)
+{
+	board_configure_dcache(1);
+	return 0;
+}
+#endif
 
 /************************************************************************************
  * Name: stm32_boardinitialize
@@ -166,6 +191,8 @@ stm32_boardinitialize(void)
 {
 	board_on_reset(-1); /* Reset PWM first thing */
 
+	board_configure_dcache(0);
+
 	/* configure LEDs */
 	board_autoled_initialize();
 

boards/px4/fmu-v5/default.cmake

@@ -55,6 +55,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		tap_esc
 		telemetry # all available telemetry drivers

boards/px4/fmu-v5/fixedwing.cmake

@@ -38,6 +38,7 @@ px4_add_board(
 		rc_input
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		telemetry # all available telemetry drivers
 		uavcan

boards/px4/fmu-v5/multicopter.cmake

@@ -43,6 +43,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		tap_esc
 		telemetry # all available telemetry drivers

boards/px4/fmu-v5/nuttx-config/nsh/defconfig

@@ -23,10 +23,13 @@ CONFIG_ARCH_INTERRUPTSTACK=750
 CONFIG_ARCH_MATH_H=y
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_BASEPRI_WAR=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
 CONFIG_ARMV7M_DTCM=y
 CONFIG_ARMV7M_ICACHE=y
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_ARMV7M_USEBASEPRI=y
+CONFIG_BOARDCTL_FINALINIT=y
 CONFIG_BOARDCTL_RESET=y
 CONFIG_BOARD_CRASHDUMP=y
 CONFIG_BOARD_LOOPSPERMSEC=22114

boards/px4/fmu-v5/rover.cmake

@@ -43,6 +43,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		telemetry # all available telemetry drivers
 		uavcan

boards/px4/fmu-v5/rtps.cmake

@@ -54,6 +54,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		tap_esc
 		telemetry # all available telemetry drivers

boards/px4/fmu-v5/src/init.c

 /****************************************************************************
  *
- *   Copyright (c) 2012-2016 PX4 Development Team. All rights reserved.
+ *   Copyright (c) 2012-2019 PX4 Development Team. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -32,7 +32,7 @@
  ****************************************************************************/
 
 /**
- * @file px4fmu_init.c
+ * @file init.c
  *
  * PX4FMU-specific early startup code.  This file implements the
  * nsh_archinitialize() function that is called early by nsh during startup.
@@ -210,6 +210,7 @@ __EXPORT void board_on_reset(int status)
 #ifdef CONFIG_BOARDCTL_FINALINIT
 int board_app_finalinitialize(uintptr_t arg)
 {
+	board_configure_dcache(1);
 	return 0;
 }
 #endif
@@ -229,6 +230,8 @@ stm32_boardinitialize(void)
 {
 	board_on_reset(-1); /* Reset PWM first thing */
 
+	board_configure_dcache(0);
+
 	/* configure LEDs */
 
 	board_autoled_initialize();

boards/px4/fmu-v5/stackcheck.cmake

@@ -54,6 +54,7 @@ px4_add_board(
 		roboclaw
 		stm32
 		stm32/adc
+		stm32/armv7-m_dcache
 		stm32/tone_alarm
 		tap_esc
 		telemetry # all available telemetry drivers

src/drivers/boards/common/CMakeLists.txt

@@ -38,6 +38,7 @@ if ((${PX4_PLATFORM} MATCHES "nuttx") AND NOT ${PX4_BOARD} MATCHES "io")
 		board_crashdump.c
 		board_dma_alloc.c
 		board_gpio_init.c
+		board_dcache_control.c
 		)
 
 	if (${CONFIG_ARCH_CHIP} MATCHES "kinetis")

src/drivers/boards/common/board_dcache_control.c

+/****************************************************************************
+ *
+ *   Copyright (C) 2019 PX4 Development Team. All rights reserved.
+ *   Author: @author David Sidrane <david_s5@nscdg.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file board_dcache_control.c
+ * Support for parameter based control of dcache for the
+ * ARM 1259864 Data corruption eratta
+ */
+
+#include <px4_config.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "nvic.h"
+#include "cache.h"
+#include "up_arch.h"
+
+#include <parameters/param.h>
+
+#define CPUID_REVISION_SHIFT           0
+#define CPUID_REVISION_MASK            (0xf << CPUID_REVISION_SHIFT)
+#define CPUID_REVISION(cpuid)          (((cpuid) & CPUID_REVISION_MASK) >> CPUID_REVISION_SHIFT)
+#define CPUID_PARTNO_SHIFT             4
+#define CPUID_PARTNO_MASK              (0xfff << CPUID_PARTNO_SHIFT)
+#define CPUID_PARTNO(cpuid)            (((cpuid) & CPUID_PARTNO_MASK) >> CPUID_PARTNO_SHIFT)
+# define CPUID_CORTEX_M7               0xc27
+#define CPUID_VARIANT_SHIFT            20
+#define CPUID_VARIANT_MASK             (0xf << CPUID_VARIANT_SHIFT)
+#define CPUID_VARIANT(cpuid)            (((cpuid) & CPUID_VARIANT_MASK) >> CPUID_VARIANT_SHIFT)
+#define CPUID_IMPLEMENTER_SHIFT        24
+#define CPUID_IMPLEMENTER_MASK         (0xff << CPUID_IMPLEMENTER_SHIFT)
+#define CPUID_IMPLEMENTER(cpuid)       (((cpuid) & CPUID_IMPLEMENTER_MASK) >> CPUID_IMPLEMENTER_SHIFT)
+
+#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
+/************************************************************************************
+ * Name: board_configure_dcache
+ *
+ * Description:
+ *  Called at various points in start up to disable the dcache if the
+ *  1259864 Data corruption in a sequence of Write-Through stores and loads
+ *  errata is preset.
+ *
+ * Input Parameters:
+ *   stage - 0 - early init no OS;
+ *           1  - OS and file system are runnting;
+ *
+ * Returned Value:
+ ************************************************************************************/
+
+void board_configure_dcache(int stage)
+{
+	/* 1259864 Data corruption in a sequence of Write-Through stores and loads
+	 * Fault Status: Present in r0p1, r0p2, r1p0 and r1p1. Fixed in r1p2
+	 */
+
+	uint32_t cpuid = getreg32(NVIC_CPUID_BASE);
+
+
+	bool erratta = CPUID_PARTNO(cpuid) == CPUID_CORTEX_M7 && (CPUID_VARIANT(cpuid) == 0 || (CPUID_VARIANT(cpuid) == 1
+			&& CPUID_REVISION(cpuid) < 2));
+
+	/* On boot we should default to disabled on effected HW */
+
+	if (erratta && stage == 0) {
+		arch_disable_dcache();
+		return;
+	}
+
+	/* Based on a param We can enable the dcache */
+
+	if (stage != 0) {
+
+		int32_t dcache = board_get_dcache_setting();
+
+		switch (dcache) {
+		default:
+		case 0:
+			erratta ? arch_disable_dcache() : arch_enable_dcache();
+			break;
+
+		case 1:
+			arch_disable_dcache();
+			break;
+
+		case 2:
+			arch_enable_dcache();
+			break;
+			return;
+		}
+
+	}
+}
+
+/************************************************************************************
+ * Name: board_dcache_info
+ *
+ * Description:
+ *  Called to retrieve dcache info and optionally set dcache to on or off.
+ *
+ * Input Parameters:
+ *  action  - -1 Provide info only.
+ *  pmesg   - if non null return the chipid revision and patch level
+ *            will indicate if the dcache eratta is present.
+ *  state   - if non null return the state of the dcache
+ *            true on, false is off.
+ *
+ * Returned Value:
+ *   0 - success
+ *
+ ************************************************************************************/
+
+int board_dcache_info(int action, char **pmesg, bool *pstate)
+{
+	uint32_t cpuid = getreg32(NVIC_CPUID_BASE);
+	static char mesg[] = "r?p? has dcache eratta!";
+	bool erratta = (CPUID_PARTNO(cpuid) == CPUID_CORTEX_M7 && (CPUID_VARIANT(cpuid) == 0 || (CPUID_VARIANT(cpuid) == 1
+			&& CPUID_REVISION(cpuid) < 2)));
+
+	mesg[1] = '0' + CPUID_VARIANT(cpuid);
+	mesg[3] = '0' + CPUID_REVISION(cpuid);
+
+	if (!erratta) {
+		mesg[5] = 'O';
+		mesg[6] = 'K';
+		mesg[7] = '\0';
+	}
+
+	if (action == 0) {
+		arch_disable_dcache();
+	}
+
+	if (action == 1) {
+		arch_enable_dcache();
+	}
+
+	if (pmesg) {
+		*pmesg = mesg;
+	}
+
+	if (pstate) {
+		*pstate = getreg32(NVIC_CFGCON) & NVIC_CFGCON_DC ? true : false;
+	}
+
+	return 0;
+
+}
+#endif

src/drivers/boards/common/board_internal_common.h

@@ -117,3 +117,67 @@ __EXPORT void board_gpio_init(const uint32_t list[], int count);
  ************************************************************************************/
 
 __EXPORT int board_determine_hw_info(void);
+
+#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
+/************************************************************************************
+ * Name: board_configure_dcache
+ *
+ * Description:
+ *  Called at various points in start up to disable the dcache if the
+ *  1259864 Data corruption in a sequence of Write-Through stores and loads
+ *  errata is preset.
+ *
+ * Input Parameters:
+ *   stage - 0 - early init no OS;
+ *           1  - OS and file system are runnting;
+ *
+ * Returned Value:
+ * None
+ ************************************************************************************/
+
+void board_configure_dcache(int stage);
+
+/************************************************************************************
+ * Name: board_get_dcache_setting
+ *
+ * Description:
+ *  Called to retrieve the parameter setting to enable/disable
+ *  the dcache.
+ *
+ * Input Parameters:
+ *  None
+ *
+ * Returned Value:
+ *  -1 -  Not set - if Eratta exits turn dcache off else leave it on
+ *   0 -  if Eratta exits turn dcache off else leave it on
+ *   1 -  Force it off
+ *   2 -  Force it on
+ *
+ ************************************************************************************/
+
+int board_get_dcache_setting(void);
+
+/************************************************************************************
+ * Name: board_dcache_info
+ *
+ * Description:
+ *  Called to retrieve dcache info and optionally set dcache to on or off.
+ *
+ * Input Parameters:
+ *  action  - -1 Provide info only.
+ *  pmesg   - if non null return the chipid revision and patch level
+ *            will indicate if the dcache eratta is present.
+ *  state   - if non null return the state of the dcache
+ *            true on, false is off.
+ *
+ * Returned Value:
+ *   0 - success
+ *
+ ************************************************************************************/
+
+int board_dcache_info(int action, char **pmesg, bool *pstate);
+#else
+#  define board_configure_dcache(stage)
+#  define board_get_dcache_setting()
+#  define board_dcache_info(action, pmesg, pstate)
+#endif

src/drivers/stm32/armv7-m_dcache/CMakeLists.txt

+############################################################################
+#
+#   Copyright (c) 2015-2019 PX4 Development Team. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name PX4 nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+px4_add_module(
+	MODULE drivers__armv7-m_dcache
+	MAIN dcache
+	SRCS
+	armv7-m_dcache.cpp
+	)

src/drivers/stm32/armv7-m_dcache/armv7-m_dcache.cpp

+/****************************************************************************
+ *
+ *   Copyright (C) 2019 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * @file armv7-m_dcache.cpp
+ *
+ * Driver for the armv7 m_dcache.
+ *
+ */
+
+#include <px4_config.h>
+#include <px4_log.h>
+#include <board_config.h>
+#include <stdint.h>
+#include <string.h>
+
+#include <parameters/param.h>
+
+#include "cache.h"
+
+#if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
+
+extern "C" __EXPORT int dcache_main(int argc, char *argv[]);
+extern "C" __EXPORT int board_get_dcache_setting();
+
+/************************************************************************************
+ * Name: board_get_dcache_setting
+ *
+ * Description:
+ *  Called to retrieve the parameter setting to enable/disable
+ *  the dcache.
+ *
+ * Input Parameters:
+ *  None
+ *
+ * Returned Value:
+ *  -1 -  Not set - if Eratta exits turn dcache off else leave it on
+ *   0 -  if Eratta exits turn dcache off else leave it on
+ *   1 -  Force it off
+ *   2 -  Force it on
+ *
+ ************************************************************************************/
+
+int board_get_dcache_setting()
+{
+	param_t ph = param_find("SYS_FORCE_F7DC");
+	int32_t dcache_setting = -1;
+
+	if (ph != PARAM_INVALID) {
+		param_get(ph, &dcache_setting);
+	}
+
+	return dcache_setting;
+}
+
+int dcache_main(int argc, char *argv[])
+{
+	int action = -1;
+	char *pmesg = nullptr;
+	bool state = false;
+
+	if (argc > 1) {
+		if (!strcmp(argv[1], "on") || !strcmp(argv[1], "1")) {
+			action = 1;
+		}
+
+		if (!strcmp(argv[1], "off") || !strcmp(argv[1], "0")) {
+			action = 0;
+		}
+	}
+
+	board_dcache_info(action, &pmesg, &state);
+	PX4_INFO("M7 cpuid %s dcache %s", pmesg, state ? "On" : "Off");
+	return 0;
+}
+#endif

src/drivers/stm32/armv7-m_dcache/params.c

+/****************************************************************************
+ *
+ *   Copyright (c) 2019 PX4 Development Team. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name PX4 nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/**
+ * Force F7 D cache on and disregard errata 1259864 data corruption in
+ * a sequence of write-through stores and loads on ARM M7 silicon
+ * Fault Status: Present in r0p1, r0p2, r1p0 and r1p1. Fixed in r1p2
+ *
+ *
+ * @min 0
+ * @max 2
+ * @value 0 if Eratta exits turn dcache off else leave it on
+ * @value 1 Force it off
+ * @value 2 Force it on
+ * @group Chip
+ * @category Developer
+
+ */
+PARAM_DEFINE_INT32(SYS_FORCE_F7DC, 0);