Added Keysight hardware and scheduling

pulse_lib/tests/configurations/configurations.yaml

@@ -3,6 +3,7 @@ default: KeysightMocked
 KeysightMocked:
     station: keysight_mocked.yaml
     backend: Keysight
+    schedule: Mock
     awg_channels:
         AWG1: [P1,P2,P3,]
         AWG2: [P4,P5,P6,P7]
@@ -23,6 +24,7 @@ KeysightMocked:
 KeysightQSMocked:
     station: keysight_qs_mocked.yaml
     backend: Keysight_QS
+    schedule: Mock
     awg_channels:
         AWG1: [P1,P2,P3,]
         AWG2: [P4,P5,P6,P7]
@@ -61,6 +63,7 @@ QbloxMocked:
 TektronixMocked:
     station: tektronix_mocked.yaml
     backend: Tektronix_5014
+    schedule: Mock
     awg_channels:
         AWG1: [P1,P2,P3,]
         AWG2: [P4,P5,P6,P7]
@@ -90,3 +93,26 @@ QbloxV1:
         SD2: [Qblox_module8,2]
     runner: core_tools
 
+
+KeysightSdS:
+    station: keysight_test_sds.yaml
+    backend: Keysight
+    schedule: HVI2
+    # P1,P3,P6,P7 are connected to SD1-SD4
+    awg_channels:
+        AWG1: [P1,P2,P3,]
+        AWG2: [P4,P5,P6,P7]
+        AWG3: [I1,Q1,I2,Q2]
+    markers:
+        M1: [AWG1,4]
+        M_IQ: [AWG3,0]
+    sensors:
+        SD1: [Dig1,1]
+        SD2: [Dig1,2]
+        SD3: [Dig1,3]
+        SD4: [Dig1,4]
+    rf:
+        SD2:
+            output: M1
+            startup_time: 500
+    runner: qcodes

pulse_lib/tests/configurations/keysight_test_sds.yaml

+instruments:
+
+  sig_gen1:
+    type: qcodes.tests.instrument_mocks.DummyInstrument
+    enable_forced_reconnect: true
+    init:
+      gates: ['frequency','power']
+    parameters:
+      frequency:
+        limits: [0,20e9]
+
+  sig_gen2:
+    type: qcodes.tests.instrument_mocks.DummyInstrument
+    enable_forced_reconnect: true
+    init:
+      gates: ['frequency','power']
+    parameters:
+      frequency:
+        limits: [0,20e9]
+
+  AWG1:
+    type: keysight_fpga.qcodes.M3202A_fpga.M3202A_fpga
+    enable_forced_reconnect : True
+    init:
+      chassis : 1
+      slot : 3
+
+  AWG2:
+    type: keysight_fpga.qcodes.M3202A_fpga.M3202A_fpga
+    enable_forced_reconnect : True
+    init:
+      chassis : 1
+      slot : 7
+
+  AWG3:
+    type: keysight_fpga.qcodes.M3202A_fpga.M3202A_fpga
+    enable_forced_reconnect : True
+    init:
+      chassis : 1
+      slot : 9
+
+  AWG4:
+    type: keysight_fpga.qcodes.M3202A_fpga.M3202A_fpga
+    enable_forced_reconnect : True
+    init:
+      chassis : 1
+      slot : 11
+
+  Dig1:
+    type: keysight_fpga.qcodes.M3102A_fpga.M3102A_fpga
+    enable_forced_reconnect: true
+    init:
+      chassis: 1
+      slot: 5
+

pulse_lib/tests/configurations/test_configuration.py

@@ -217,10 +217,17 @@ class Context:
         pulse.define_marker(name, awg, channel, setup_ns=setup_ns, hold_ns=hold_ns)
 
     def add_hw_schedule(self, sequence):
-        backend = self._configuration['backend']
-        if backend in ['Keysight','Keysight_QS']:
+        cfg = self._configuration
+        schedule = cfg.get('schedule', None)
+        if schedule == 'Mock':
             sequence.set_hw_schedule(HardwareScheduleMock())
-        elif backend == 'Tektronix_5014':
+        elif schedule == 'HVI2':
+            hvi2_schedule = getattr(self, 'hvi2_schedule', None)
+            if hvi2_schedule == None:
+                from core_tools.HVI2.hvi2_schedule_loader import Hvi2ScheduleLoader
+                self.hvi2_schedule = Hvi2ScheduleLoader(self.pulse, "SingleShot")
+            sequence.set_hw_schedule(self.hvi2_schedule)
+        elif schedule == 'TektronixM4i':
             sequence.set_hw_schedule(TektronixSchedule(self.pulse))
 
     def run(self, name, sequence, *params, silent=False):
@@ -276,7 +283,26 @@ class Context:
             else:
                 print('No acquisition info for backend ' + backend)
 
+#    def plot_measurement(self, sequence, m_param):
+#        # average n_rep
+#        # time trace...
+#        s_params = sequence.params
+#        n_params = len(s_params)
+#        data = m_param()
+#        if n_params == 0:
+#            print({name:values[0] for name,values in zip(m_param.names, data)})
+#        elif n_params == 1:
+#            for name in m_param.names:
+#                pt.figure()
+#                pt.legend()
+#                pt.grid()
+#                pt.ylabel('amplitude [V]')
+#                pt.xlabel('time [ns]')
+#                pt.title(f'name')
+#                self._savefig()
+
     def plot_segments(self, segments, index=(0,), channels=None, awg_output=True):
+        # TODO: fix index if ndim > 1
         pt.ioff()
         for s in segments:
             pt.figure()
@@ -284,6 +310,12 @@ class Context:
             s.plot(index, channels=channels, render_full=awg_output)
             self._savefig()
 
+    def plot_ds(self, ds):
+        runner = self._configuration['runner']
+        if runner == 'core_tools':
+            pass
+        elif runner == 'qcodes':
+            pass
 
     def _savefig(self):
         backend = self._configuration['backend']