Updated for Qblox and improved acquire()

pulse_lib/examples/example_IQ_correction.py

 import matplotlib.pyplot as pt
-
+from numpy import pi
 import qcodes as qc
 
 from pulse_lib.tests.hw_schedule_mock import HardwareScheduleMock
 
 
-from pulse_lib.tests.mock_m3202a import MockM3202A_fpga
-from pulse_lib.tests.mock_m3202a_qs import MockM3202A_QS
-from pulse_lib.base_pulse import pulselib
-from pulse_lib.virtual_channel_constructors import IQ_channel_constructor
 
 from utils.plot import plot_awgs
+from configuration.medium_iq import init_hardware, init_pulselib
 
 #import qcodes.logger as logger
 from qcodes.logger import start_all_logging
@@ -18,111 +15,43 @@ from qcodes.logger import start_all_logging
 start_all_logging()
 
 
-if not qc.Station.default:
-    station = qc.Station()
-else:
-    station = qc.Station.default
-
-backend = 'Keysight'
-#backend = 'Keysight_QS'
-#backend = 'Qblox'
-# There is not mock for Tektronix
-
-def station_get_or_create(func):
-    def wrapper(name, *args, **kwargs):
-        try:
-            return station[name]
-        except:
-            component = func(name, *args, **kwargs)
-            station.add_component(component)
-            return component
-    return wrapper
-
-@station_get_or_create
-def add_M3202A_fpga(name, chassis, slot):
-    return MockM3202A_fpga(name, chassis, slot)
-
-@station_get_or_create
-def add_M3202A_QS(name, chassis, slot):
-    return MockM3202A_QS(name, chassis, slot)
-
-
-def init_hardware():
-    if backend == 'Keysight':
-        awg1 = add_M3202A_fpga("AWG1", 0, 2)
-    elif backend == 'Keysight_QS':
-        awg1 = add_M3202A_QS("AWG1", 0, 2)
-    else:
-        raise NotImplementedError(f'No AWG for backend {backend}')
-    return [awg1]
-
-def init_pulselib(awgs):
-
-    pulse = pulselib(backend=backend)
-
-    for awg in awgs:
-        pulse.add_awgs(awg.name, awg)
-
-    # define channels
-    pulse.define_channel('I1','AWG1', 1)
-    pulse.define_channel('Q1','AWG1', 2)
-    pulse.define_channel('I2','AWG1', 3)
-    pulse.define_channel('Q2','AWG1', 4)
-    pulse.add_channel_offset('I2', 10)
-    pulse.add_channel_offset('Q2', -5)
-
-    # define IQ output pair
-    IQ_pair_1 = IQ_channel_constructor(pulse)
-    IQ_pair_1.add_IQ_chan("I1", "I")
-    IQ_pair_1.add_IQ_chan("Q1", "Q")
-    # frequency of the MW source
-    IQ_pair_1.set_LO(2.40e9)
-
-    IQ_pair_2 = IQ_channel_constructor(pulse)
-    IQ_pair_2.add_IQ_chan("I2", "I")
-    IQ_pair_2.add_IQ_chan("Q2", "Q")
-    # frequency of the MW source
-    IQ_pair_2.set_LO(2.40e9)
-
-    IQ_pair_1.add_virtual_IQ_channel("q0", 2.420e9)
-    IQ_pair_2.add_virtual_IQ_channel("q1", 2.420e9,
-                                     correction_gain=(0.9,1.0))
-    IQ_pair_2.add_virtual_IQ_channel("q2", 2.420e9,
-                                     correction_gain=(1.0,0.9))
-    IQ_pair_2.add_virtual_IQ_channel("q3", 2.420e9,
-                                     correction_phase=0.3)
-
-    pulse.finish_init()
-
-    return pulse
-
-awgs = init_hardware()
-p = init_pulselib(awgs)
-
-
-f_drive = 2.420e9
+awgs, digitizer = init_hardware()
+p = init_pulselib(awgs, digitizer)
+
+# set qubit frequencies for nice figures
+
+p.set_qubit_idle_frequency('q1', 2.420e9)
+p.set_qubit_idle_frequency('q2', 2.440e9)
+p.set_qubit_idle_frequency('q3', 2.840e9)
+p.set_qubit_idle_frequency('q4', 2.840e9)
+
+p.set_qubit_correction_gain('q2', 0.9, 1.0)
+p.set_qubit_correction_gain('q3', 1.0, 0.9)
+p.set_qubit_correction_phase('q4', 0.2*pi)
+
+f_drive1 = 2.420e9
+f_drive2 = 2.440e9
+f_drive3 = 2.840e9
+f_drive4 = 2.840e9
 t_X90 = 100
 amplitude = 100
 t_wait = 50
 
 manip = p.mk_segment()
-if backend == 'Keysight_QS':
-    manip.q0.wait(t_wait-10)
-    manip.reset_time()
 
-manip.q0.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q0.wait(t_wait)
+manip.q1.add_MW_pulse(0, t_X90, amplitude, f_drive1)
+manip.q1.wait(t_wait)
 manip.reset_time()
-manip.q0.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q1.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q0.wait(t_wait)
+manip.q1.add_MW_pulse(0, t_X90, amplitude, f_drive1)
+manip.q2.add_MW_pulse(0, t_X90, amplitude, f_drive2)
+manip.q1.wait(t_wait)
 manip.reset_time()
-manip.q0.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q2.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q0.wait(t_wait)
+manip.q1.add_MW_pulse(0, t_X90, amplitude, f_drive1)
+manip.q3.add_MW_pulse(0, t_X90, amplitude, f_drive3)
+manip.q1.wait(t_wait)
 manip.reset_time()
-manip.q0.add_MW_pulse(0, t_X90, amplitude, f_drive)
-manip.q3.add_MW_pulse(0, t_X90, amplitude, f_drive)
+manip.q1.add_MW_pulse(0, t_X90, amplitude, f_drive1)
+manip.q4.add_MW_pulse(0, t_X90, amplitude, f_drive4)
 
 # generate the sequence from segments
 my_seq = p.mk_sequence([manip])

pulse_lib/examples/example_param_sweep.py

@@ -26,12 +26,15 @@ seg1.P1.add_block(100, 200, v_param)
 seg2.P2.add_block(0, 100, 200)
 seg2.P2.wait(t_wait)
 seg2.reset_time()
-seg2.add_HVI_marker('dig_trigger_1', t_off=50)
+seg2.SD1.acquire(40)
+seg2.SD1.wait(1000)
 seg2.P1.add_block(0, 100, v_param)
 
 # create sequence
 seq = p.mk_sequence([seg1,seg2])
+seq.n_rep = 10
 seq.set_hw_schedule(HardwareScheduleMock())
+seq.set_acquisition(t_measure=100)
 
 for t in seq.t_wait.values:
     for v_pulse in seq.vPulse.values:

pulse_lib/examples/example_param_sweep_qc.py

@@ -45,10 +45,10 @@ DataSet.default_io = io
 station = Station()
 
 # create "AWG1"
-awgs = init_hardware()
+awgs,digitizer = init_hardware()
 
 # create channels P1, P2
-p = init_pulselib(awgs)
+p = init_pulselib(awgs, digitizer)
 
 v_param = lp.linspace(0, 200, 5, axis=0, unit = "mV", name = "vPulse")
 t_wait = lp.linspace(20, 100, 3, axis=1, unit = "mV", name = "t_wait")
@@ -63,13 +63,15 @@ seg1.P1.add_block(100, 200, v_param)
 seg2.P2.add_block(0, 100, 200)
 seg2.P2.wait(t_wait)
 seg2.reset_time()
-seg2.add_HVI_marker('dig_trigger_1', t_off=50)
+seg2.SD1.acquire(40)
 seg2.P1.add_block(0, 100, v_param)
+seg2.SD1.wait(1000)
 
 # create sequence
 seq = p.mk_sequence([seg1,seg2])
+seq.n_rep=5
 seq.set_hw_schedule(HardwareScheduleMock())
+seq.set_acquisition(t_measure=100)
+param = seq.get_measurement_param()
 
-dig_param = DummyParam('dummy', 200, 10)
-
-qc_run('SweepDemo', seq, dig_param)
+qc_run('SweepDemo', seq, param)

pulse_lib/examples/example_smooth_step.py

@@ -6,7 +6,7 @@ from scipy.signal import gaussian
 import pulse_lib.segments.utility.looping as lp
 from pulse_lib.tests.hw_schedule_mock import HardwareScheduleMock
 
-from configuration.small import init_hardware, init_pulselib
+from configuration.small import init_hardware, init_pulselib, _backend
 from utils.plot import plot_awgs
 
 
@@ -48,6 +48,12 @@ def gaussian_step(duration, sample_rate, amplitude, stddev):
 
 
 
+if _backend == 'Qblox':
+    raise Exception('This example does not yet work with Qblox. '
+                    'Custom pulse and ramp may not overlap.')
+
+
+
 # create "AWG1"
 awgs, digs = init_hardware()
 

pulse_lib/examples/example_virtual_IQ_multiple_segments.py

@@ -86,13 +86,13 @@ my_seq = create_seq(pulse)
 
 logging.info(f'sequence shape: {my_seq.shape}')
 
-job = my_seq.upload([0])
+job = my_seq.upload()
 
-my_seq.play([0], release=False)
+my_seq.play(release=False)
 
 plot(my_seq, job, awgs)
 pprint(job.upload_info)
 
-my_seq.play([0], release=True)
+my_seq.play(release=True)
 my_seq.uploader.release_jobs()
 

pulse_lib/examples/psb_example.py

@@ -34,7 +34,7 @@ seg.add_block(0, 10000, gates, P0, reset_time=True)
 seg.add_block(0, 10000, gates, P1, reset_time=True)
 seg.add_ramp(0, 500, gates, P1, P2, reset_time=True)
 seg.add_ramp(0, 500, gates, P2, PSB_sweep, reset_time=True)
-seg.add_HVI_marker('dig_trigger_1', 100)
+seg.SD1.acquire(100)
 seg.add_block(0, 50000, gates, PSB_sweep, reset_time=True)
 seg.add_block(0, 10000, gates, P0, reset_time=True)
 
@@ -46,6 +46,8 @@ for index in [(0,0), (0,4), (9,0), (9,4)]:
 # generate the sequence from segments
 my_seq = p.mk_sequence([seg])
 my_seq.set_hw_schedule(HardwareScheduleMock())
+my_seq.set_acquisition(t_measure=100)
+my_seq.n_rep = 5
 
 my_seq.upload((9,4))