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QuTech QDLabs
pulse_lib
Commits
6d9a630b
Commit
6d9a630b
authored
1 year ago
by
Sander de Snoo
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Plain Diff
Added configuration of Keysight digitizer acquisition mode and hw input channel
parent
6f97ccf3
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2 changed files
pulse_lib/tests/configurations/configurations.yaml
+18
-3
18 additions, 3 deletions
pulse_lib/tests/configurations/configurations.yaml
pulse_lib/tests/configurations/test_configuration.py
+10
-5
10 additions, 5 deletions
pulse_lib/tests/configurations/test_configuration.py
with
28 additions
and
8 deletions
pulse_lib/tests/configurations/configurations.yaml
+
18
−
3
View file @
6d9a630b
...
...
@@ -168,8 +168,9 @@ QbloxGS1:
KeysightSdS
:
station
:
keysight_test_sds.yaml
backend
:
Keysight
# station: keysight_test_sds_qs.yaml
backend
:
Keysight_QS
#
backend: Keysight_QS
schedule
:
HVI2
# P1,P3,P6,P7 are connected to SD1-SD4
awg_channels
:
...
...
@@ -186,7 +187,21 @@ KeysightSdS:
SD3
:
[
Dig1
,
3
]
SD4
:
[
Dig1
,
4
]
rf
:
# SD2:
# output: M1
# startup_time: 500
SD1
:
output
:
[
AWG1
,
4
]
frequency
:
150e6
amplitude
:
200
startup_time
:
200
prolongation_time
:
30
hw_input_channel
:
1
SD2
:
output
:
M1
startup_time
:
500
output
:
[
AWG1
,
4
]
frequency
:
100e6
amplitude
:
400
startup_time
:
200
prolongation_time
:
30
hw_input_channel
:
1
runner
:
core_tools
This diff is collapsed.
Click to expand it.
pulse_lib/tests/configurations/test_configuration.py
+
10
−
5
View file @
6d9a630b
...
...
@@ -155,11 +155,11 @@ class Context:
n_gates
=
len
(
gates
)
self
.
virtual_matrix
=
np
.
diag
([
0.9
]
*
n_gates
)
+
0.1
pulse
.
add_virtual_matrix
(
name
=
'
virtual-gates
'
,
real_gate_names
=
gates
,
virtual_gate_names
=
[
'
v
'
+
gate
for
gate
in
gates
],
matrix
=
self
.
virtual_matrix
)
name
=
'
virtual-gates
'
,
real_gate_names
=
gates
,
virtual_gate_names
=
[
'
v
'
+
gate
for
gate
in
gates
],
matrix
=
self
.
virtual_matrix
)
for
i
in
range
(
n_markers
):
self
.
_add_marker
(
f
'
M
{
i
+
1
}
'
)
...
...
@@ -252,6 +252,10 @@ class Context:
output
=
params
[
'
output
'
]
if
not
isinstance
(
output
,
str
):
output
=
tuple
(
output
)
channel_conf
=
pulse
.
digitizer_channels
[
sensor
]
channel_conf
.
iq_out
=
True
dig
=
pulse
.
digitizers
[
channel_conf
.
module_name
]
dig
.
set_channel_acquisition_mode
(
channel_conf
.
channel_number
,
2
)
pulse
.
set_digitizer_frequency
(
sensor
,
params
.
get
(
'
frequency
'
,
None
))
pulse
.
set_digitizer_rf_source
(
sensor
,
output
=
output
,
...
...
@@ -259,6 +263,7 @@ class Context:
mode
=
'
pulsed
'
,
startup_time_ns
=
params
[
'
startup_time
'
],
prolongation_ns
=
params
.
get
(
'
prolongation_time
'
,
0
))
pulse
.
set_digitizer_hw_input_channel
(
sensor
,
params
.
get
(
'
hw_input_channel
'
))
if
backend
==
'
Tektronix_5014
'
:
# pulselib always wants a digitizer for Tektronix
...
...
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