Updated for tests with Keysight hardware

pulse_lib/examples/configuration/init_keysight.py

 import qcodes as qc
 
-from pulse_lib.tests.mock_m3202a import MockM3202A_fpga
-from pulse_lib.tests.mock_m3102a import MockM3102A
+_use_mock = True
+_use_core_tools = True
+
+if _use_mock:
+    from pulse_lib.tests.mock_m3202a import MockM3202A_fpga
+    from pulse_lib.tests.mock_m3102a import MockM3102A
+elif _use_core_tools:
+    from keysight_fpga.qcodes.M3202A_fpga import M3202A_fpga
+    from core_tools.drivers.M3102A import SD_DIG, MODES
+    from keysight_fpga.sd1.dig_iq import load_iq_image
+else:
+    from projects.keysight_fpga.M3202A_fpga import M3202A_fpga
+    from projects.keysight_measurement.M3102A import SD_DIG, MODES
+    from projects.keysight_fpga.dig_iq import load_iq_image
+
 
 if not qc.Station.default:
     station = qc.Station()
@@ -21,18 +34,25 @@ def station_get_or_create(func):
 
 @station_get_or_create
 def add_awg(name, slot_nr):
-    return MockM3202A_fpga(name, 0, slot_nr)
+    if _use_mock:
+        return MockM3202A_fpga(name, 0, slot_nr)
+    else:
+        return M3202A_fpga(name, 1, slot_nr)
 
 @station_get_or_create
 def add_digitizer(name, slot_nr):
-    return MockM3102A(name, 0, slot_nr)
+    if _use_mock:
+        return MockM3102A(name, 0, slot_nr)
+    else:
+        dig = SD_DIG(name, 1, slot_nr)
+        load_iq_image(dig.SD_AIN)
+        dig.set_acquisition_mode(MODES.AVERAGE)
+        return dig
 
 
 #%%
 
-_use_dummy=True
-
-awg1 = add_awg('AWG1', 2)
-awg2 = add_awg('AWG2', 3)
-dig1 = add_digitizer('DIG1', 6)
+awg1 = add_awg('AWG1', 3)
+awg2 = add_awg('AWG2', 7)
+dig1 = add_digitizer('DIG1', 5)
 

pulse_lib/examples/example_dig_acquire.py

@@ -7,6 +7,7 @@ import qcodes.logger as logger
 from qcodes.logger import start_all_logging
 
 from pulse_lib.tests.hw_schedule_mock import HardwareScheduleMock
+#from core_tools.HVI2.hvi2_schedule_loader import Hvi2ScheduleLoader
 
 from configuration.medium import init_hardware, init_pulselib
 from utils.plot import plot_awgs
@@ -34,12 +35,12 @@ def create_seq(pulse_lib):
     s.vP3.add_block(2e4, 3e4, 50)
     s.vP3.add_ramp_ss(3e4, 3.5e4, 50, 0)
     s.vP1.add_block(2e4, 3e4, -100)
+    s.vP2.add_block(2e4, 3e4, 120)
     s.SD1.acquire(2e4)
     s.SD2.acquire(2e4)
 
     # generate the sequence and upload it.
     my_seq = pulse_lib.mk_sequence([seg1, seg2, seg3])
-    my_seq.set_hw_schedule(HardwareScheduleMock())
     my_seq.n_rep = 10
     my_seq.sample_rate = 1e9
 
@@ -60,6 +61,9 @@ my_seq.set_acquisition(t_measure=1e4)
 # with Downsampling:
 # my_seq.set_acquisition(t_measure=1e4, sample_rate=0.5e6)
 
+my_seq.set_hw_schedule(HardwareScheduleMock())
+# my_seq.set_hw_schedule(Hvi2ScheduleLoader(pulse, "SingleShot", digs[0]))
+
 logging.info(f'sequence shape: {my_seq.shape}')
 
 job = my_seq.upload()

pulse_lib/examples/example_dig_param.py

@@ -2,13 +2,15 @@ import logging
 from pprint import pprint
 import numpy as np
 import matplotlib.pyplot as pt
+from collections.abc import Sequence
 
 import qcodes.logger as logger
 from qcodes.logger import start_all_logging
 
-from pulse_lib.tests.hw_schedule_mock import HardwareScheduleMock
+#from pulse_lib.tests.hw_schedule_mock import HardwareScheduleMock
+from projects.keysight_measurement.hvi2.hvi2_schedule_loader import Hvi2ScheduleLoader
 
-from configuration.medium import init_hardware, init_pulselib
+from configuration.medium_iq import init_hardware, init_pulselib
 from utils.plot import plot_awgs
 
 #start_all_logging()
@@ -19,12 +21,16 @@ def create_seq(pulse_lib):
 
     seg1 = pulse_lib.mk_segment(name='init')
     s = seg1
-    s.vP1.add_block(0, 500, 50)
+    s.vP1.add_block(0, 2000, 50)
+    s.vP2.add_ramp_ss(0, 100, 50, 100)
+    s.vP2.add_ramp_ss(100, 200, 100, 50)
 
     seg2 = pulse_lib.mk_segment('manip')
     s = seg2
     s.vP2.add_ramp_ss(0, 100, 50, 100)
-    s.vP2.add_ramp_ss(100, 200, 100, 50)
+    s.vP2.add_ramp_ss(100, 2000, 100, 50)
+    s.reset_time()
+    s.q1.add_MW_pulse(100, 200, 50, 2.45e9)
 
     seg3 = pulse_lib.mk_segment('measure')
     s = seg3
@@ -34,12 +40,13 @@ def create_seq(pulse_lib):
     s.vP3.add_block(2e4, 3e4, 50)
     s.vP3.add_ramp_ss(3e4, 3.5e4, 50, 0)
     s.vP1.add_block(2e4, 3e4, -100)
-    s.SD1.acquire(2e4, ref='m1')
-    s.SD2.acquire(2e4, ref='m2')
+    s.vP2.add_block(2e4, 3e4, 120)
+    s.SD1.acquire(2e4, ref='m1', threshold=10, zero_on_high=True)
+    s.SD2.acquire(2e4, ref='m2', threshold=50)
 
     # generate the sequence and upload it.
     my_seq = pulse_lib.mk_sequence([seg1, seg2, seg3])
-    my_seq.set_hw_schedule(HardwareScheduleMock())
+#    my_seq.set_hw_schedule(HardwareScheduleMock())
     my_seq.n_rep = 10
 
     return my_seq
@@ -57,6 +64,7 @@ t_measure = 5_000
 pulse.set_digitizer_phase('SD2', -0.228*np.pi)
 
 my_seq = create_seq(pulse)
+my_seq.set_hw_schedule(Hvi2ScheduleLoader(pulse, "SingleShot", digs[0]))
 my_seq.set_acquisition(t_measure=t_measure)
 
 param = my_seq.get_measurement_param('Test', upload='auto', iq_complex=False)
@@ -66,15 +74,18 @@ param.add_derived_param('m2_phase', lambda d:np.angle(d['m2_I']+1j*d['m2_Q']))
 # Reading param uploads, plays and returns data
 data = param()
 
+data = param()
+
 # plot_awgs(awgs+digs)
 
 pt.figure()
 for ch_name,values in zip(param.names, data):
     print(ch_name, values)
-    if isinstance(values[0], complex):
-        pt.plot(values.real, label=ch_name+' I')
-        pt.plot(values.imag, label=ch_name+' Q')
-    else:
-        pt.plot(values, label=ch_name)
+    if isinstance(values, (Sequence, np.ndarray)):
+        if isinstance(values[0], complex):
+            pt.plot(values.real, label=ch_name+' I')
+            pt.plot(values.imag, label=ch_name+' Q')
+        else:
+            pt.plot(values, label=ch_name)
 pt.legend()
 

pulse_lib/examples/example_param_sweep_qc.py

@@ -9,7 +9,8 @@ from qcodes.loops import Loop
 from qcodes.actions import Task
 
 from configuration.small import init_hardware, init_pulselib
-#from utils.plot import plot_awgs
+from utils.plot import plot_awgs
+#from core_tools.HVI2.hvi2_schedule_loader import Hvi2ScheduleLoader
 
 def upload_play(seq):
     seq.upload()
@@ -65,12 +66,13 @@ seg2.reset_time()
 seg2.SD1.acquire(150)
 seg2.P1.add_block(0, 300, v_param)
 seg2.P2.add_block(0, 300, v_param)
-seg2.SD1.wait(1000)
+seg2.SD1.wait(1500)
 
 # create sequence
 seq = p.mk_sequence([seg1,seg2])
 seq.n_rep=5
 seq.set_hw_schedule(HardwareScheduleMock())
+#seq.set_hw_schedule(Hvi2ScheduleLoader(p, "SingleShot", digs[0]))
 seq.set_acquisition(t_measure=100)
 param = seq.get_measurement_param()