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Alberto Ruiz Garcia
Firmware
Commits
1d289f77
Commit
1d289f77
authored
6 years ago
by
David Sidrane
Committed by
Lorenz Meier
6 years ago
Browse files
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Plain Diff
stm32:drv_led_pwm Null entry check
parent
f3e312e7
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1 changed file
src/drivers/stm32/drv_led_pwm.cpp
+34
-31
34 additions, 31 deletions
src/drivers/stm32/drv_led_pwm.cpp
with
34 additions
and
31 deletions
src/drivers/stm32/drv_led_pwm.cpp
+
34
−
31
View file @
1d289f77
...
...
@@ -116,49 +116,52 @@ led_pwm_timer_get_period(unsigned timer)
static
void
led_pwm_timer_init_timer
(
unsigned
timer
)
{
i
rqstate_t
flags
=
px4_enter_critical_section
();
i
f
(
led_pwm_timers
[
timer
].
base
)
{
/* enable the timer clock before we try to talk to it */
irqstate_t
flags
=
px4_enter_critical_section
();
modifyreg32
(
led_pwm_timers
[
timer
].
clock
_register
,
0
,
led_pwm_timers
[
timer
].
clock_bit
);
/* enable the
timer
clock
before we try to talk to it */
/* disable and configure the timer */
rCR1
(
timer
)
=
0
;
rCR2
(
timer
)
=
0
;
rSMCR
(
timer
)
=
0
;
rDIER
(
timer
)
=
0
;
rCCER
(
timer
)
=
0
;
rCCMR1
(
timer
)
=
0
;
rCCMR2
(
timer
)
=
0
;
rCCR1
(
timer
)
=
0
;
rCCR2
(
timer
)
=
0
;
rCCR3
(
timer
)
=
0
;
rCCR4
(
timer
)
=
0
;
rCCER
(
timer
)
=
0
;
rDCR
(
timer
)
=
0
;
modifyreg32
(
led_pwm_timers
[
timer
].
clock_register
,
0
,
led_pwm_timers
[
timer
].
clock_bit
);
if
((
led_pwm_timers
[
timer
].
base
==
STM32_TIM1_BASE
)
||
(
led_pwm_timers
[
timer
].
base
==
STM32_TIM8_BASE
))
{
/* disable and configure the timer */
rCR1
(
timer
)
=
0
;
rCR2
(
timer
)
=
0
;
rSMCR
(
timer
)
=
0
;
rDIER
(
timer
)
=
0
;
rCCER
(
timer
)
=
0
;
rCCMR1
(
timer
)
=
0
;
rCCMR2
(
timer
)
=
0
;
rCCR1
(
timer
)
=
0
;
rCCR2
(
timer
)
=
0
;
rCCR3
(
timer
)
=
0
;
rCCR4
(
timer
)
=
0
;
rCCER
(
timer
)
=
0
;
rDCR
(
timer
)
=
0
;
/* master output enabl
e =
on */
if
((
led_pwm_timers
[
timer
].
base
==
STM32_TIM1_BASE
)
||
(
led_pwm_timers
[
timer
].
bas
e
=
=
STM32_TIM8_BASE
))
{
rBDTR
(
timer
)
=
ATIM_BDTR_MOE
;
}
/* master output enable = on */
rBDTR
(
timer
)
=
ATIM_BDTR_MOE
;
}
/* If the timer clock source provided as clock_freq is the STM32_APBx_TIMx_CLKIN
* then configure the timer to free-run at 1MHz.
* Otherwise, other frequencies are attainable by adjusting .clock_freq accordingly.
*/
/* If the timer clock source provided as clock_freq is the STM32_APBx_TIMx_CLKIN
* then configure the timer to free-run at 1MHz.
* Otherwise, other frequencies are attainable by adjusting .clock_freq accordingly.
*/
rPSC
(
timer
)
=
(
led_pwm_timers
[
timer
].
clock_freq
/
1000000
)
-
1
;
rPSC
(
timer
)
=
(
led_pwm_timers
[
timer
].
clock_freq
/
1000000
)
-
1
;
/* configure the timer to update at the desired rate */
/* configure the timer to update at the desired rate */
rARR
(
timer
)
=
(
1000000
/
LED_PWM_RATE
)
-
1
;
rARR
(
timer
)
=
(
1000000
/
LED_PWM_RATE
)
-
1
;
/* generate an update event; reloads the counter and all registers */
rEGR
(
timer
)
=
GTIM_EGR_UG
;
/* generate an update event; reloads the counter and all registers */
rEGR
(
timer
)
=
GTIM_EGR_UG
;
px4_leave_critical_section
(
flags
);
px4_leave_critical_section
(
flags
);
}
}
#endif
...
...
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