On a FMU without a px4io (FMUv4, NXPhlite etc), this code should
  not be run.

   One a 32.768 is added (RC16) to the board this will keep time.

   The fix ix in nuttx. This is just the defconfig changes to use
   it.

   There were 2 problems. The first was that the interrupt did
   test DINT and raise a completion events. But since DINT is
   just an indication of DMA completion, TC is a valid way to
   determine that the transfer is complete.

   The second problem is that Software Reset For DAT Line
   SDHC_SYSCTL[RSTD] clears the bits 24-0 in SDHC_PROTO
   this looses the wide bus setting DTW

   Flash programing on the K66 has to be units of 8 bytes. So we cache
   the write of words until there are 2 written. Then the 2 words are
   written to FLASH. This change ensure the bin file has an even
   number of (4 byte) words by padding the last section in progflash
   with 0xffffffff if needed.

   On the K66 we use the first word of the Battery backed up RAM
   as the bootloader - app communication location.

   Since nxphlite V1 was never released, we reused that code point.

   Since the only device on the bus is the barro, int or ext does
   not apply. This will be fixed on the rev > RC15.
   This defines an alias that can be used to condition the buss logic
   connection logic px4_i2c_bus_external to return external.