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  1. Sep 28, 2018
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  4. Sep 25, 2018
    • Beat Küng's avatar
    • David Sidrane's avatar
      tap-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · 6ec693b7
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      6ec693b7
    • David Sidrane's avatar
      px4nucleoF767ZI-v1 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · 3f1a155e
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      3f1a155e
    • David Sidrane's avatar
      px4fmu-v5 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · f7dd2511
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      f7dd2511
    • David Sidrane's avatar
      px4fmu-v5 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · a6e77eb9
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      a6e77eb9
    • David Sidrane's avatar
      px4fmu-v4pro nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · a302c58a
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      a302c58a
    • David Sidrane's avatar
      px4fmu-v4 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · 825d6c06
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      825d6c06
    • David Sidrane's avatar
      px4fmu-v4 nsh: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · dfc390bb
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      dfc390bb
    • David Sidrane's avatar
      px4fmu-v2 stackcheck: Disable ARCH_IRQPRIO & ARCH_HIPRI_INTERRUP · 2ec56cef
      David Sidrane authored
         This insures the common exception handler will not be
         re-entered. The handler does not support nested interrupts
         and the interrupt stack pointer and context will be overwritten
         resulting in hard to debug hardfaults.
      
         If all the priorities are equal the NVIC prevents the
         preemption. The startup code defaults all the priorities
         to the same value 128.
      
         This change safeguards in 2 ways 1) By disabling
         CONFIG_ ARCH_IRQPRIO: up_prioritize_irq cannot be called.
         This will insure that all HW interrupts are at the same
         priority.
      
         2) By disabling CONFIG_ARCH_HIPRI_INTERRUP, the common
         exception will disable any interrupts during interrupt
         processing.
      2ec56cef
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