Removed the legacy FMUv4 define that was activating a nonexistent
   pull up and on some HW driving the PPM_IN aka RC_IN aka SPEKTRUM_RX
   to VDD.

   Also detailed the connections of this pins for the board.

   The simplest connection is RC_IN to a timer capture pin
   and a UART.
   In this case the UART_RX pin and just be left as is.
   While the pin can be configured as the PPM_IN (Timer capture)
   or as SPEKTRUM_RX_AS_GPIO_OUTPUT to use it as and GPIO to
   facilitate binding.

  Renamed the macros and defines to be more explicit as to what
  Is being done and the sense of the parameters

   Removed the legacy FMUv4 define that was activating a nonexistent
   pull up and on some HW driving the PPM_IN aka RC_IN aka SPEKTRUM_RX
   to VDD.

   Also detailed the connections of this pins for the board.

   The simplest connection is RC_IN to a timer capture pin
   and a UART.
   In this case the UART_RX pin and just be left as is.
   While the pin can be configured as the PPM_IN (Timer capture)
   or as SPEKTRUM_RX_AS_GPIO_OUTPUT to use it as and GPIO to
   facilitate binding.

  Renamed the macros and defines to be more explicit as to what
  Is being done and the sense of the parameters

   Use the abstaction SPEKTRUM_POWER to enable the interface not
   the define for the GPIO pin.

   Use the clearer macro definitions

   Removed the legacy FMUv4 define that was activating a nonexistent
   pull up and on some HW driving the PPM_IN aka RC_IN aka SPEKTRUM_RX
   to VDD.

   Use the abstaction SPEKTRUM_POWER to enable the interface not
   the define for the GPIO pin.

   Removed the legacy FMUv4 define that was activating a nonexistent
   pull up and on some HW driving the PPM_IN aka RC_IN aka SPEKTRUM_RX
   to VDD.

   Also detailed the connections of this pins for the board.

   The simplest connection is RC_IN to a timer capture pin
   and a UART.
   In this case the UART_RX pin and just be left as is.
   While the pin can be configured as the PPM_IN (Timer capture)
   or as SPEKTRUM_RX_AS_GPIO_OUTPUT to use it as and GPIO to
   facilitate binding.

  Renamed the macros and defines to be more explicit as to what
  Is being done and the sense of the parameters

This range amkes much more sense for MAV applications.
It reduces vibration vulnerability caused by measurement range clipping.

Just to make sure that it will never be used on NuttX. This is not an
architectural limitation, just a memory optimization, since we call
clearenv() on NuttX.

This is duplicated in src/include/visibility and is directly included via
compiler flag '-include'

This is already added in px4_base.cmake and PX4_INCLUDE_DIR is not set
either.

To reduce dropouts, and because we have enough RAM :)

Frees up around 6kB of RAM on Pixracer & Pixhawk.

   Returned the fmu mixer code to where it updated the HW once
   it has a mixer. But  only signals a up_pwm_update() for
   onshots on actual control update.

   Before this change the hw outpuse were not updated.

* cmake: Fixes problem caused when the generated parameters.xml differs for the ARM and DSP builds.

* fix px4_getopt.h: add accidentally removed file

   A recent change in in the fmu stops the instance when a
   xxxx_reset command is used issued if the fmu was not
   already running.

   That change left publications published and then on the
   next creation created a new publications was created.

   This change calls orb_unadvertise to mark the publication
   as un published so that on the next instantiations of the
   fmu it resumes publishing on the same publication.

* VTOL back transition maintain FW_PSP_OFF

* VTOL Front transition FW_PSP_OFF rampup

* stm32 Updated flash patch to upstream (fixes missing commit)

* Removed zubaxgnss-v1_bootloader check build will not fit

Removing zubaxgnss-v1_bootloader from the check build. It is overflowing flash by 6 Bytes.

DeltaQuad params

   Recent upsteam NuttX changes needed by PX4 added sem_[wait|post]
   in the stm32_flash driver.

   UAVCAN Bootloaders do not use the OS's scheduler etal.
   This commit nops the sem_[wait|post] with linker magic.
   Which precludes the linking the nuttx scheduler in the
   bootloader build.

  PX4 contrib from <jose.souza@intel.com>

  1) stm32: Fix erase sector number for microcontrolers with
     more than 11 sectors

     Erase a sector from the second bank cause the bit 4 of SNB being set
     but never unsed, so trying to erase a sector from the first bank
     was acually eraseing a sector from the second bank.
  2) stm32: Make up_progmem thread safe

   Writing to a flash sector while starting the erase of other sector
   have a undefined behavior so lets add a [staticaly initalized]
   semaphore and syncronize access to Flash registers.

  3) Add workaround for flash data cache corruption on
     read-while-write

    This is a know hardware issue on some STM32 see the errata
    of your model and if you make use of both memory banks you
    should enable it.

  4) Greg's cleanup

  5) PX4 clean up

    stm32_flash:Need conditional on non F4 targets

  Last patch to rename.

* Order patch application

   Per discussion with @demarchi this PR adds ordering to the
   patch application.

   This alos add some encoding
   00000      series - is for px4 non up streamable changes
   60000 (bp) series - is for back ports
   90000      series - is for wip that shold make it upstream

* Restore 00010-workarround-for-flash-data-cache-corruption

  Extract this from the 90000-wip-inflight-to-upstream.patch
  and orders it.

* Moved upstreamed 0dbf44e flash fix to bp patch

* Moved upstreamed 5481087 cdcacm fix to bp patch

* Moved upstreamed ec85425 STM32F7 copy paste errors to bp patch

* Moved upstreamed 20e7237 HSI should not be turned off to bp patch

* Moved upstreamed ca895b9 Adding missing CONFIG_ prefix to bp patch

* Moved upstreamed 169b398 STM32: Fixes the bkp reference counter issue to bp patch

* Moved upstreamed 550d259 STM32F7: Fixes the bkp reference counter issue to bp patch

* Moved upstreamed 02825f3 STM32F3X: Add missing STM32_BKP_BASE to bp patch

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Renamed for ordering and classification

* Order Patches by Name