Add back pwm out sim module so HITL simulation works again.

With 24 MHz accesses to the SD card were unreliable. And the chance of
failure recently got worse, so that logging became impossible.

* Support for armv7-m_dcache control via parameter

  The FORCE_F7_DCACHE parameter can be set to
   0 - (default) if Eratta exits turn dcache off else leave it on
   1 -  Force it off
   2 -  Force it on

   At boot the system will disable the d-cache if the silicon
   has the 1259864 Data corruption in a sequence of Write-Through
   stores and loads eratta.

   Post nsh script execution the FORCE_F7_DCACHE paramater
   will be used to set the d-cache to the state indicated
   above.

Delete trailing whitespace, extra newlines, to quiet git hooks and add an extra = so that it does not appear to git as a merge conflict marker.

   I2C bus chaged I2C0 is external, I2C1 internal
     Added BMM150 on I2C1 @ Addr 0x100
     Added BMP280 on I2C1 @ Addr 0x76

   UART0 (/dev/ttyS1) now used at Telem 2

   Chip select added for W25X40CLUXIG Calibration EE prom
     Driver is not added at this time

The replay functionality was broken with lockstep. This is an interim
fix for the replay functionality.

In the longer term it would be nice to leverage the lockstep speedup
for the replay.

 * working debugging (one click build and debug)
   * SITL jmavsim
   * SITL gazebo
   * jlink px4_fmu-v{2-5}
 * improved syntax highlighting
   * GNU linker files
   * ROS message files msg/*.msg
   * jinja2 template files
 * fixed intellisense support

   This also fixes a typo in the GPIO defines

Signed-off-by: Claudio Micheli <claudio@auterion.com>